1. Field of the Invention
This invention relates to the field of semiconductor devices, and more specifically, to a process for detecting open defects in a semiconductor device.
2. Background Information
In the manufacture of semiconductor devices it is important to have methods for testing a device and determining if it is a good device or if it contains defects before selling such a product to a customer. Some methods of testing a device for defects use a "modeling" system. In a modeling system there is at least one device which is presumably not defective. This non-defective model (model) is tested and the results are stored in a memory. Other devices which are like the model are then tested and the results of the tested devices are compared to the results of the model. If the results are the same or are within a manufacturer's tolerance levels (i.e. a manufacturer's acceptable ranges for deviation from the model) then the device is presumably a good or non-defective device and may be sold to a customer. If the results are not the same and are not within the manufacturer's tolerance levels then the device is a defective device and cannot be sold to a customer.
A Stored Response Pattern Tester (SRPT) is one system used to test CMOS devices. The SRPT (tester) works by storing several tester patterns in the RAM memory of the tester and applies those patterns to a device under test (DUT) at an operating frequency and compares the device response to the model. In other words, an operating voltage is applied to the input of the DUT, the tester then measures the voltage at the output pins of the DUT (measured voltage) and compares that value, i.e. the measured voltage, to the expected stored response (expected voltage) which is stored in the memory of the tester. Defective, or bad devices, are detected by voltage differences between the measured voltage and the expected voltage at that output pin of the DUT.
FIG. 1 illustrates a device under test (DUT) 100. Circuit 110, from point A to point B, represents a properly connected circuit. Circuit 120, from point C to point D, represents an open circuit. When testing DUT 100 with the SRPT (tester), described above, a voltage is applied to point A and the voltage at point B is then measured. The measured voltage is then compared to the expected voltage stored within the memory of the tester. Since circuit 110 is a properly connected circuit the measured voltage is the same (or within tolerance level) as the expected voltage, thus the circuit tests "good".
One problem with the SRPT is that it may not be able to detect open circuits. For example, a disconnected gate in a device in some cases may not appear as an open circuit when testing with an SRPT. When a voltage is applied at an input on a circuit, a disconnected gate may appear to be "connected" since the voltage applied to a circuit (V.sub.DD) appears across the gate due to capacitive coupling and/or tunneling effects.
FIG. 1 illustrates circuits 110 and 120. Both circuits 110 and 120 are made of two transistors, transistors 140 and 150 and transistors 160 and 170, respectively.
Circuit 110 is properly connected and has an intact gate input 130. Thus when testing circuit 110 with the SRPT, a voltage is applied at point A and the voltage at point B is measured. Because the gate input of circuit 110 is properly connected the measured voltage at point B is within the tolerance levels of the expected voltage and the device will test as "good."
Circuit 120, however, is improperly connected and has a gate input open 125. When testing circuit 120 with an SRPT, a voltage is applied at point C and the voltage at point D is measured. Because circuit 120 has a gate input open 125 the measured voltage may be significantly less than the expected voltage and the device would test as "defective". However, due to capacitive coupling and/or tunneling effects the voltage applied to the circuit, V.sub.DD, may "tunnel" across transistors 160 and 170 showing a voltage potential between V.sub.DD and Ground at point D. Therefore, the measured voltage at point D may be within tolerance levels of the expected voltage and the device would test as "good". It should be noted that capacitive coupling and tunneling effects are well known in the art and are not described herein in detail. Thus, there is no way to determine if an SRPT actually detects an open circuit in a device. Because of this some defective devices (i.e. devices with open circuits) may be passed on to a customer.
Thus, what is needed is an accurate method for detecting open circuits in a semiconductor device.